Alif Semiconductor /AE302F80F55D5AE_CM55_HE_View /VBAT /TIMER_CLKSEL

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Interpret as TIMER_CLKSEL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)SEL1 0 (Val_0x0)SEL2 0 (Val_0x0)SEL3 0 (Val_0x0)SEL4

SEL3=Val_0x0, SEL1=Val_0x0, SEL4=Val_0x0, SEL2=Val_0x0

Description

LPTIMER Clock Select Register

Fields

SEL1

LPTIMER0 clock select

0 (Val_0x0): S32K_CLK

1 (Val_0x1): 128K_CLK (128 kHz)

2 (Val_0x2): External clock from LPTMR0_CLK_IO pin

3 (Val_0x3): S32K_CLK

SEL2

LPTIMER1 clock select

0 (Val_0x0): S32K_CLK

1 (Val_0x1): 128K_CLK (128 kHz)

2 (Val_0x2): External clock from LPTMR1_CLK_IO pin

3 (Val_0x3): LPTIMER0 toggle output (LPTMR0_OUT)

SEL3

LPTIMER2 clock select

0 (Val_0x0): S32K_CLK

1 (Val_0x1): 128K_CLK (128 kHz)

2 (Val_0x2): External clock from LPTMR2_CLK_IO pin

3 (Val_0x3): S32K_CLK

SEL4

LPTIMER3 clock select

0 (Val_0x0): S32K_CLK

1 (Val_0x1): 128K_CLK (128 kHz)

2 (Val_0x2): External clock from LPTMR3_CLK_IO pin

3 (Val_0x3): LPTIMER2 toggle output (LPTMR2_OUT)

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